The freebasic runtime library is needed to create the 64bit executable and the freebasic runtime library is a 32bit static library.
You cannot link a 64bit object file with a 32bit object file (or, in the case of the static library, a collection of 32bit object files).
While recompiling the freebasic runtime library (creating a 64bit version of the runtime library) seems like a good idea I'm fairly sure that's not going to work either. The source code needs to be changed for that to work.
I'm afraid, albert, you are not going to be able to create a 64bit executable using the fbc (regardless of the toolchain used).
-gen GCC and 64bit exes
I was searching around for 64bit assemblers, and found GoAsm.
GoAsm has a program that supposedly can convert 32bit asm to 64bit asm, called AdaptAsm.exe
http://www.godevtool.com/GoasmHelp/64bits.htm#convert
It says that there are a few things that it yet cannot convert.??
GoAsm has a program that supposedly can convert 32bit asm to 64bit asm, called AdaptAsm.exe
http://www.godevtool.com/GoasmHelp/64bits.htm#convert
It says that there are a few things that it yet cannot convert.??
I found this on the masm32 site.
http://www.masm32.com/board/index.php?topic=12460
Its called "MasmBasic" , alot of basic keyword macros. But its 32bit also.
http://www.masm32.com/board/index.php?topic=12460
Its called "MasmBasic" , alot of basic keyword macros. But its 32bit also.
Landeel wrote:Hm, interesting. I was looking for a tool like this a while ago, and gave up.
However, even if we use this in an ASM file spit by fbc and it works (I don't see it happening), still the rtlib and gfx must be adapted to build on 64-bit.
Such tool is not possible. The above tool is an semiautomatic helper tool to make some substitutions. It is not even close to run unattended.
I don't know if LEA is allowed with 32-bit regs in 64-bit mode, but if it does, the tool might go wrong there. (since it substitutes all [] syntax with 64-bit regs, while lea is sometimes used as an quick multiplication)
@marcov
Apparently according to the adaptasm docs it will completely convert a 32bit asm to 64bit asm.
But the fine print states that pointers are not converted and need to be converted by hand.
So i guess it just converts opcodes , pointers need to be converted by hand.
http://www.godevtool.com/GoasmHelp/64bits.htm#convert
under the "64-bit programming in practice"
click on "Converting existing 32-bit code to 64-bit "
===============================================
I've been studying the Intel and AMD opcodes manual, and a couple EBook .PDF's on compiler design and OS'design.
I might branch off and write my own assembler and high-level language and OS.
Apparently according to the adaptasm docs it will completely convert a 32bit asm to 64bit asm.
But the fine print states that pointers are not converted and need to be converted by hand.
So i guess it just converts opcodes , pointers need to be converted by hand.
http://www.godevtool.com/GoasmHelp/64bits.htm#convert
under the "64-bit programming in practice"
click on "Converting existing 32-bit code to 64-bit "
===============================================
I've been studying the Intel and AMD opcodes manual, and a couple EBook .PDF's on compiler design and OS'design.
I might branch off and write my own assembler and high-level language and OS.
@MichaelW
AdaptAsm also converts MASM32 and NASM32 to GoAsm64.
But the program need some additional work done to it.
Converting Pointers to data ,types, structs it does'nt do.
I emailed AMD and asked if they could put a complete binary opcode chart on their forum.
I'm going to try to write my own assembler. Then i can make it simple.
instead of
AL , AH , AX , EAX , RAX
I can do
A1 , A2 , A16 , A32 , A64 alot simpler.
A1>B1 easier than mov BL,AL
A64 > DS[1,1024] etc.. where [1 is data seg 1 , 1024 is loc 1024]
AdaptAsm also converts MASM32 and NASM32 to GoAsm64.
But the program need some additional work done to it.
Converting Pointers to data ,types, structs it does'nt do.
I emailed AMD and asked if they could put a complete binary opcode chart on their forum.
I'm going to try to write my own assembler. Then i can make it simple.
instead of
AL , AH , AX , EAX , RAX
I can do
A1 , A2 , A16 , A32 , A64 alot simpler.
A1>B1 easier than mov BL,AL
A64 > DS[1,1024] etc.. where [1 is data seg 1 , 1024 is loc 1024]
albert wrote:@marcov
Apparently according to the adaptasm docs it will completely convert a 32bit asm to 64bit asm.
Yes and aftershave ads say that girls will fight over you if you wear it :-)
But the fine print states that pointers are not converted and need to be converted by hand.
So i guess it just converts opcodes , pointers need to be converted by hand.
Afaik it replaces register names in most safe cases, and the more interesting bits are (that deal with calling conventions) are specific for the macro assembler in question.
IOW it does one very minor thing (do some replaces some regs) , and a few major things, which are unfortunately not useful for the general case.
So that leaves you with the register substitution, something that sb could probably code in 30minutes. In summary: Not worth the attention
I've been studying the Intel and AMD opcodes manual, and a couple EBook .PDF's on compiler design and OS'design.
I might branch off and write my own assembler and high-level language and OS.
How many significant programs have you written and maintained for a few years? I would not venture into the deep without at least having done that.
albert wrote:@MichaelW
AdaptAsm also converts MASM32 and NASM32 to GoAsm64.
(macro) Syntax conversion yes. Not any masm32 source to a truely 64-bit source.
I emailed AMD and asked if they could put a complete binary opcode chart on their forum.
Just check the nasm sources, the tables are all there.
I'm going to try to write my own assembler. Then i can make it simple.
instead of
AL , AH , AX , EAX , RAX
I can do
A1 , A2 , A16 , A32 , A64 alot simpler.
Doesn't make sense IMHO, and solves a non existing problem. Learning the names of the registers is about the least complicated bit about assembler :_)
@Marcov
I delved into the source code of FASM and it apparently has the whole instruction sets of both the Intel and AMD processors up to the curent.
FASM according to the docs, can output a pure non-OS-specific binary by excluding the file type ie.. OMF,COFF,PE,ELF.
But I don't know if it can specify security-rings 0 to 3 for a program.
And I don't know if you can setup your own GDT and LDT's.
And Funny; Intel has opcodes that AMD doesn't and AMD has opcodes
that Intel doesn't, which leads to SSE4.a and SSE4.b.
Also i found this site: http://ref.x86asm.net/index.html
It has the lowdown on 16/32/64 bit instruction sets.
But i think it only goes to SSE2.
With writing an assembler, you can basically make any changes to std reg names and opcode mneumonics as long as it outputs the correct binary data.
some of the std mneumonic abbreviations are a litle cryptic and should probably be be replaced by the full action-name or an easy to spot and understand symbol. ADC BX,DX = ( b16+ d16 ,carry) .???
I delved into the source code of FASM and it apparently has the whole instruction sets of both the Intel and AMD processors up to the curent.
FASM according to the docs, can output a pure non-OS-specific binary by excluding the file type ie.. OMF,COFF,PE,ELF.
But I don't know if it can specify security-rings 0 to 3 for a program.
And I don't know if you can setup your own GDT and LDT's.
And Funny; Intel has opcodes that AMD doesn't and AMD has opcodes
that Intel doesn't, which leads to SSE4.a and SSE4.b.
Also i found this site: http://ref.x86asm.net/index.html
It has the lowdown on 16/32/64 bit instruction sets.
But i think it only goes to SSE2.
With writing an assembler, you can basically make any changes to std reg names and opcode mneumonics as long as it outputs the correct binary data.
some of the std mneumonic abbreviations are a litle cryptic and should probably be be replaced by the full action-name or an easy to spot and understand symbol. ADC BX,DX = ( b16+ d16 ,carry) .???
albert wrote:I delved into the source code of FASM and it apparently has the whole instruction sets of both the Intel and AMD processors up to the curent.
Maybe, I've no interest in FASM.
But the main reason why I name NASM is because we watch NASM tables too. (the FPC internal assembler was originally based on it, though it has taken a different form and format years ago)
But I don't know if it can specify security-rings 0 to 3 for a program.
That is an OS thing, and has nothing to do with assembler. For such things, the only solution is to read the manuals that AMD and Intel already publish. But sit tight, since those are thousands of pages. And those scare me too
And Funny; Intel has opcodes that AMD doesn't and AMD has opcodes
that Intel doesn't, which leads to SSE4.a and SSE4.b.
Nothing new, happens all the time.
With writing an assembler, you can basically make any changes to std reg names and opcode mneumonics as long as it outputs the correct binary data.
Sure, the question is what the point of such exercise would be.
some of the std mneumonic abbreviations are a litle cryptic and should probably be be replaced by the full action-name or an easy to spot and understand symbol. ADC BX,DX = ( b16+ d16 ,carry) .???
I don't see what problem that would solve. As said It is the least difficult bit of assembler, and moreover the opcodes are wellknown and used for 30 years now,with whole libraries of books documenting and using them.
albert wrote:@MichaelW
AdaptAsm also converts MASM32 and NASM32 to GoAsm64.
But the program need some additional work done to it.
Converting Pointers to data ,types, structs it does'nt do.
I wouldn't use a program witch transforms 32-bit code into 64-bit code, because it only appears to make sense. Since it wouldn't use the additional 64 bit Registers the Program remains the same (exept it crashes on the use of pointers.) So such a program is less or equal useful to an at&t2nasm tool.
I emailed AMD and asked if they could put a complete binary opcode chart on their forum.
Why don't ask Google: http://ref.x86asm.net/
I'm going to try to write my own assembler. Then i can make it simple.
instead of
AL , AH , AX , EAX , RAX
I can do
A1 , A2 , A16 , A32 , A64 alot simpler.
A1>B1 easier than mov BL,AL
A64 > DS[1,1024] etc.. where [1 is data seg 1 , 1024 is loc 1024]
Apart from introducing some new, strage syntax you assembler could do something usefull, e.g:
Being fast for producing .bin-files as well as elf, pe-coff, mz, etc. object files.
Or you writing some sort of preassembler, witch compiles some assembly like language into nasm, gas, etc. but contains a relouder, so you can work with an infinit number of psydo regs.
Be aware of something like A1>B1 instead of "mov BL, AL". From the logic point of view it's better to have one general format for all instructions. So you only need to know their effect, but not a special syntax for them.
Why don't you include the operant lengh into the opcode, so you could use
mov32 ar, [br] instead of mov eax, [rbx] on 64 bit systems.
Yeah Sannaj!
That makes sense.
It would be easy to program if Intel and AMD would just have:
Instruction bits ; (maybe 24 bits)
memory bits ; (maybe 36 bits)
memory bits ; (maybe 36 bits also)
so all instructions would be 96 bits, and code segment would be 96 bit alligned.
so
mov al,bl = 24 0 bits + 72 zero bits
mov al,bh =23 0 bits + 1 bit + 72 zero bits
mov mem , mem = binary move instruction + 36mem + 36mem
And on and on through all the possible 24 bits (16,777,216) of instructions.
The chip designers get carried away trying to make it backwards compatible, rather than making it simple and writing source-code processor conversion software.
That makes sense.
It would be easy to program if Intel and AMD would just have:
Instruction bits ; (maybe 24 bits)
memory bits ; (maybe 36 bits)
memory bits ; (maybe 36 bits also)
so all instructions would be 96 bits, and code segment would be 96 bit alligned.
so
mov al,bl = 24 0 bits + 72 zero bits
mov al,bh =23 0 bits + 1 bit + 72 zero bits
mov mem , mem = binary move instruction + 36mem + 36mem
And on and on through all the possible 24 bits (16,777,216) of instructions.
The chip designers get carried away trying to make it backwards compatible, rather than making it simple and writing source-code processor conversion software.
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