fbsound 1.0 Win/Lin 32/64-bit (wav mp3 ogg mod it xm s3m)

[St_W]

Licenses of used libs are included in the doc folder libDumb.txt, libMad.txt and libVorbis.txt

Thank you, I see. What is still missing is the license for your code.

[mrToad]

What, are you afraid that he might take you to court one day? Just take screenshots of this conversation. xD

Just a joke...

[St_W]

What, are you afraid that he might take you to court one day? Just take screenshots of this conversation. xD

haha, no :-). I also do not have any plans where I'd need audio support. I just wanted to encourage people to take licencing seriously and do it properly. Similar to bad code bad licensing might cause troubles in future. As D.J.Peters usually creates good code that is useful for at least some people proper licensing is especially important. On the other hand when we consider bad code, which probably wouldn't be used by anyone anyway, licensing is not really an issue.

And proper licensing usually isn't hard. Just have a look at the existing licenses and choose a suitable one. I've already referred to the Choose-A-License initiative by GitHub, one of the biggest global code hosters.

[paul doe]

Licenses of used libs are included in the doc folder libDumb.txt, libMad.txt and libVorbis.txt

Thank you, I see. What is still missing is the license for your code.

Very interesting. Thanks for pointing it out, I've never thought of it that way. In fact, I believed that code without license defaulted to 'public domain' instead of copyrighted.

@Joshy: this is the license that I'll pick for my code: http://www.wtfpl.net/

As you can see, it's a very permisive license LOL

[D.J.Peters]

My (none FreeBASIC) software pays all my bills since 30 years now.
The commercial stuff is all closed source and copyright by my.
My customers accept the German law when buying.

All my own FreeBASIC stuff is hobby and absolutely free and open source.
If I compile libs from other sources for FreeBASIC the source code (if changed by me) or only the original license if any are included.

Joshy

[St_W]

All my own FreeBASIC stuff is hobby and absolutely free and open source.

It is still your code and copyrighted by you - especially in Germany where no such thing like putting code in 'public domain' exists. From a legal point you have to explicitly grant people the right to use/modify/distribute/etc. your code, this isn't automatically granted when you publish the source code. So without your permission people may not do anything with your code. Normally these rights are granted by a license (e.g. MIT license). I'm doubtful whether saying that your code is "absolutely free and open source" is sufficient from a legal perspective. I'd guess that it's not, but I'm no lawyer. Because of that I don't want to dive deeper into the licensing topic.

Again, I just wanted to make people aware of that. Your code and your use of code from other sources are totally fine. And I'm really thankful for all the useful code you've contributed to FB over the last years. In practice the licensing issue is probably neglectible too as I hope you won't sue us now or in future :-), but ideally a proper license would exactly define what users are allowed to do with your code (and what not). (Because it will always stay your code.)

[mrToad]

Again, I just wanted to make people aware of that. [...] a proper license would exactly define what users are allowed to do with your code (and what not). (Because it will always stay your code.)

Yup I agree, it is a good thing for us all to at least be aware of. And a good practice that I will use now. Plainly a thing that only becomes an issue when the author makes it an issue, and so generally not much to worry about when the author expressively doesn't care. I'm hoping that we have at least enough trust in this long-time FB community that we needn't be paranoid. Those things are just in place to protect authors by default, and I'm glad they are. But the author is the one that has to pull the trigger, and as most of us were thinking it's public domain by default, I don't think we ever had such an intention.

All the same, good to know, and good to practice!

[MrSwiss]

The issue isn't really new, it has been discussed in the past ...
In the case linked below, it's about reposting (translated) code,
from this forum and, asking for permission, to do so.
just about a year ago ...
Even that, is actually covered by copyright law (for those, not
yet aware of it).

[D.J.Peters]

For a new project I'm working on
I port FBSound to Windows and Linux X86_64
and may be __FB_ARM__ 32-Bit NEON also.

I cut the CPU detection stuff from FBSound: fbscpu.bas 64-bit port
so some of you can test on your 32 and 64 bit boxes and post the string you get.

I would like to see "SSE 4.2" from your box my are all older once :-)

Thank you

Joshy

Code: Select all

GenuineIntel, X86_64, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1 ~3200 MHz
GenuineIntel, X86, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3 ~2666 MHz
AuthenticAMD, X86, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, 3D NOW 1,2 ~1802 MHz

file cpustuff.bas

Code: Select all

''' ASM fill n bytes with 0
private _
sub _ZeroAsm(byval d as any ptr, _ ' destination
             byval n as integer)   ' n bytes
  asm
#ifndef __FB_64BIT__  
    mov    edi,[d]
    mov    ecx,[n]
    xor    eax,eax
    shr    ecx,1
    jnc    zeroasm_2
    stosb

  zeroasm_2:
    shr    ecx,1
    jnc    zeroasm_4
    stosw

  zeroasm_4:
    jecxz  zeroasm_end

  zeroasm_loop:
    stosd
    dec    ecx
    jnz    zeroasm_loop
  
#else

    mov    rdi,[d]
    mov    rcx,[n]
    xor    rax,rax
    shr    rcx,1
    jnc    zeroasm_2
    stosb

  zeroasm_2:
    shr    rcx,1
    jnc    zeroasm_4
    stosw

  zeroasm_4:
    shr    rcx,1
    jnc    zeroasm_8
    stosd

  zeroasm_8:
    jecxz  zeroasm_end

  zeroasm_loop:
    stosq
    dec    rcx
    jnz    zeroasm_loop
#endif
  
  zeroasm_end:
  end asm
end sub

private _
function ReadEFLAG() as integer
  asm
#ifndef __FB_64BIT__
   pushfd  'eflag on stack
   pop eax 'in eax
   mov [function],eax
#else  
   pushfq
   pop rax 'in rax
   mov [function],rax
#endif  
  end asm
end function

private _
sub WriteEFLAG(byval v as integer)
  asm
#ifndef __FB_64BIT__
  mov eax,[v]  
  push eax
  popfd
#else
  xor rax,rax
  mov rax,[v]
  push rax
  popfq
#endif  
  end asm
end sub

private _
function ReadTSC() as longint
  asm
    rdtsc
#ifndef __FB_64BIT__
    mov [function],eax
    mov [function+4],edx
#else    
    shl rdx, 32
    or  rax, rdx
    mov [function],rax
#endif    
  end asm
end function

private _
function IsCPUID() as boolean
  dim as integer o,n
  o = ReadEFLAG()
  n = o xor (1 shl 21) ' change bit 21
  WriteEFLAG(n)
  n = ReadEFLAG()
  WriteEFLAG(o)        ' restore old value
  return (o<>n)
end function 

private _
function CPUID_EAX(byval nr as long) as long
  asm mov eax,[nr]
  asm cpuid
  asm mov [function],eax
end function 

private _
function CPUID_EBX(byval nr as long) as long
  asm mov eax,[nr]
  asm cpuid
  asm mov [function],ebx
end function

private _
function CPUID_ECX(byval nr as long) as long
  asm mov eax,[nr]
  asm cpuid
  asm mov [function],ecx
end function

private _
function CPUID_EDX(byval nr as long) as long
  asm mov eax,[nr]
  asm cpuid
  asm mov [function],edx
end function 

type ME_
  as boolean x86_64,cpuid,fpu,tsc,cmov,mmx,mmx2,sse,sse2,sse3,sse41,sse42,n3d,n3d2
  as longint Mhz
  as integer nCores
end type
dim as ME_ me

dim as string   msg
dim as ulong ptr p
dim as long  ct,r
dim as longint c1,c2,cd
dim as double t1,t2,td
me.cpuid = IsCPUID()

if me.cpuid then
  msg=space(12) : p=cptr(ulong ptr, strptr(msg))
  p[0]=CPUID_EBX(0)
  p[1]=CPUID_EDX(0)
  p[2]=CPUID_ECX(0)
  
  #ifndef __FB_64BIT__
    msg &= ", X86"
  #else
    msg &= ", X86_64"   
  #endif
  
  r=CPUID_EBX(1)
  me.nCores = (r shr 16) and &HFF
  if me.nCores then msg &= ", "  & me.nCores & " cpu cores"
    
  msg &= ", CPUID"   
   
  r=CPUID_EDX(1)
  
  if (r and (1 shl  0)) then me.fpu =true
  if (r and (1 shl  4)) then me.tsc =true
  if (r and (1 shl 15)) then me.cmov=true
  if (r and (1 shl 23)) then me.mmx =true
  if (r and (1 shl 25)) then
    me.sse=true
    if (r and (1 shl 26)) then me.sse2=true
  end if  

  r=CPUID_ECX(1)
  if me.sse then
    if (r and (1 shl 9)) then
      me.sse3 =true
      if (r and (1 shl 19)) then
        me.sse41=true
        if (r and (1 shl 20)) then me.sse42=true   
      end if
    end if
  end if
  
  r=CPUID_EAX(1 shl 31)
  if (r and (1 shl 31)) andalso (r and &HFF) then 
    r=CPUID_EDX((1 shl 31) or (1 shl 0))
    if me.mmx then
      if (r and (1 shl 20)) then me.mmx2=true
    end if  
    if (r and (1 shl 31)) then
      me.n3d=true
      if me.n3d then
        if (r and (1 shl 30)) then me.n3d2=true
      end if  
    end if  
  end if
  
  if me.fpu  then msg &= ", FPU"
  if me.tsc  then msg &= ", RDTSC"
  if me.cmov then msg &= ", CMOVxx, FCMOVxx"
  
  if me.mmx then 
    msg &= ", MMX I"
    if me.mmx2 then msg &= ",II"
  end if  
  if me.sse  then
    msg &= ", SSE"
    if me.sse2 then
      msg &= ",2"
      if me.sse3 then
        msg &= ",3"
        if me.sse41 then
          msg &= ",4.1"
          if me.sse42 then
            msg &= ",4.2"
          end if
        end if
      end if
    end if
  end if ' SSE         

  if me.n3d then
    msg &= ", 3D NOW 1"
    if me.mmx2 then msg &= ",2"
  end if    

  if me.tsc=true then
    t1=timer()
    c1=ReadTSC()
    while td<1.0:t2=timer:td=t2-t1:wend
    c2=ReadTSC()
    cd=c2-c1
    cd\=1000000
    me.MHz=cd*td
    msg &= " ~" & str(me.Mhz) & " MHz"
  end if
  print msg
end if
sleep

[paul doe]

GenuineIntel, X86_64, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2166 MHz here...

[D.J.Peters]

added:

Code: Select all

  r=CPUID_EBX(1)
  me.nCores = (r shr 16) and &HFF
  if me.nCores then msg &= ", "  & me.nCores & " cpu cores"

[MrSwiss]

GenuineIntel, X86_64, 16 cpu cores, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2903 MHz
A I7 mobile (7th Gen.), 2 phys. cores, 4 virt. cores ... (something is wrong, with CPU core's count!)

[badidea]

GenuineIntel, X86, 16 cpu cores, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2593 MHz
(fbc = 1.04.0 32-bit, Windows 8.1)
GenuineIntel, X86, 16 cpu cores, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2593 MHz (so same)
(fbc = 1.04.0 32-bit, Ubuntu Mate 64bit)

cat /proc/cpuinfo:

Code: Select all

processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 61
model name	: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz
stepping	: 4
microcode	: 0x2a
cpu MHz		: 3056.523
cache size	: 4096 KB
physical id	: 0
siblings	: 4
core id		: 0
cpu cores	: 2
apicid		: 0
initial apicid	: 0
fpu		: yes
fpu_exception	: yes
cpuid level	: 20
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb invpcid_single intel_pt spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm rdseed adx smap xsaveopt dtherm ida arat pln pts
bugs		: cpu_meltdown spectre_v1 spectre_v2
bogomips	: 5187.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 39 bits physical, 48 bits virtual
power management:

processor	: 1
vendor_id	: GenuineIntel
cpu family	: 6
model		: 61
model name	: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz
stepping	: 4
microcode	: 0x2a
cpu MHz		: 2803.125
cache size	: 4096 KB
physical id	: 0
siblings	: 4
core id		: 1
cpu cores	: 2
apicid		: 2
initial apicid	: 2
fpu		: yes
fpu_exception	: yes
cpuid level	: 20
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb invpcid_single intel_pt spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm rdseed adx smap xsaveopt dtherm ida arat pln pts
bugs		: cpu_meltdown spectre_v1 spectre_v2
bogomips	: 5187.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 39 bits physical, 48 bits virtual
power management:

processor	: 2
vendor_id	: GenuineIntel
cpu family	: 6
model		: 61
model name	: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz
stepping	: 4
microcode	: 0x2a
cpu MHz		: 3027.781
cache size	: 4096 KB
physical id	: 0
siblings	: 4
core id		: 0
cpu cores	: 2
apicid		: 1
initial apicid	: 1
fpu		: yes
fpu_exception	: yes
cpuid level	: 20
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb invpcid_single intel_pt spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm rdseed adx smap xsaveopt dtherm ida arat pln pts
bugs		: cpu_meltdown spectre_v1 spectre_v2
bogomips	: 5187.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 39 bits physical, 48 bits virtual
power management:

processor	: 3
vendor_id	: GenuineIntel
cpu family	: 6
model		: 61
model name	: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz
stepping	: 4
microcode	: 0x2a
cpu MHz		: 2848.117
cache size	: 4096 KB
physical id	: 0
siblings	: 4
core id		: 1
cpu cores	: 2
apicid		: 3
initial apicid	: 3
fpu		: yes
fpu_exception	: yes
cpuid level	: 20
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb invpcid_single intel_pt spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm rdseed adx smap xsaveopt dtherm ida arat pln pts
bugs		: cpu_meltdown spectre_v1 spectre_v2
bogomips	: 5187.75
clflush size	: 64
cache_alignment	: 64
address sizes	: 39 bits physical, 48 bits virtual
power management:

[paul doe]

added:

Code: Select all

  r=CPUID_EBX(1)
  me.nCores = (r shr 16) and &HFF
  if me.nCores then msg &= ", "  & me.nCores & " cpu cores"

Shouldn't this be:

Code: Select all

  r=CPUID_EBX(1)
  me.nCores = (r shr 24) and &HFF
  if me.nCores then msg &= ", "  & me.nCores & " cpu cores"

This at least correctly report the number of cores (been quite some time since I fiddled with CPUID):

GenuineIntel, X86_64, 2 cpu cores, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2166 MHz

[SARG]

With me.nCores = (r shr 24) and &HFF --> GenuineIntel, X86, 4 cpu cores, CPUID, FPU, RDTSC, CMOVxx, FCMOVxx, MMX I,II, SSE,2,3,4.1,4.2 ~2495 MHz


With me.nCores = (r shr 16) and &HFF ------> 16 cores obviously false it's an I5