Personally I wouldn't bother trying to interfere with the scheduler but I may give it hints (make the renderer lower priority then the phyics, etc). As to how long it takes a memory write to propogate from the issuing instruction and the physical memory update, as far as you are concerned it is visi...

I don't get the memory addressing bit between 32-bit pmode and 64-bit protected long mode. Both do mmapping and segment:offset (though most programs don't need segmentation other than the OS set up) And since it happens on what would have been a (task/thread) context switch anyway, the cycles for a...

hrm, after looking at my reply there are a number of factual errors (not the least of which as fxm pointed out being the string descriptor size). I may or may not clarify in the future. I think despite some of the inaccuracies I get the point across. Errors people/I have noticed: dodicat - It's not ...

Interesting speed optimization for 24/32-bit -> 15/16-bit.

Just out of curiosity, shouldn't it be writing ax and not eax to the result?

This is partly a question of garbage collection of which it only applies to implicit strings. The other part is variable assignments which is absolute. If you explicitly allocate string space you must explicitly deallocate it (like any memory pool). Implicit strings are strings which are in intermed...

That being said (and having nothing to do with fbc), I'm of the mindset that more backends can't hurt no matter the target. Obviously priority must be given based on need and demand and thus C is the highest priority. I don't support dropping backends and that was never discussed by the devs afaik. ...

I'm not certain about the Intel implementation of x86_64 but I do know about AMD64 (which became x86_64). Some of this is not directly related to the CPU operating mode but is relevant so please bare with me. :) After the internal CPU startup has run (ie: detect memory addresses and configuration, p...

@fxm I didn't even realize (although I should have) that variables declared within a namespace would by nature be globals (and thus static and shared are redundant). @all It's interesting to note that the AthlonXP, Pentium III (P3) cores seem to have more of an issue with the multiple dereferencing ...

heh, I very well understand your problems. I'm developing some commercial software and I'm have some TLS (thread local storage) issues. Something is corrupting my TLS indexes with a bad memory write and I can't find out where because the memory write is within the TLS itself (chicken-egg problem).

Perhaps this should be moved to a new thread. We both started on just tips and suggestions for relsofts logic but we are seriously digressing.

New topic created with quote of the relevant threading discussion:
Ramblings of crazed multi-threaders

@gonzo: I wasn't trying to suggest you don't use multi-threading, quite the opposite - I know full well your trials and tribulations when learning a whole new set of programming logic and data interactions. :) The long running worker threads is exactly the reason I created my thread pool library, so...

This forum thread (pun intended) came about from a thread in the Tips and Tricks board. Original thread topic: Using Framebased movement with Delta-timing by relsoft Re: Using Framebased movement with Delta-timing The method I use is aggressive multi-threading for each sub-system (renderer, logic (p...

There are lockless solutions available to problems, but as gonzo stated, they are a major headache to design and implement. Anywhere you have a situation of write once, read many (for example) is a good place for lockless algorithms (just create data before the readers start). Many times however, da...

The problem lies in that fbc is not an optimizing compiler. udts and pointers are slow to access because instead of caching a pointer in a register, it loads the accumulator every time. This becomes a major speed issue in complex programs which can't store everything in static variables. I've update...

The method I use is aggressive multi-threading for each sub-system (renderer, logic (physics, input processing), input, network, sound, etc). Each sub-system can then run at it's own resolution and the sub-systems use a tagged FIFO queue to communicate to each other. This allows for each sub-system ...